Full Resume

Pr. Amara AMARA

Deputy Managing Director, Research and International Cooperation             

ISEP, 10 Rue de Vanves, 92130

Issy Les Moulineaux        

Cell Phone : +33 6 45 01 13 49


Section I: Skills

  • Management

  • Education Management: conceived post graduate and under graduate programs as well as continuing education courses dedicated to professionals from industry.
  • Management Positions at ISEP: Deputy Managing Director, Director of Research and International Cooperation, Director of Electronics Department, Director of Microelectronics laboratory.
  • Management Positions at SBA University: Director of the Electronics Institute, Director of Physics Department, and Deputy Director of Physics Department.
  • Research Management: initiation and organization of the research activities at ISEP.
  • International Cooperation Management:  development of Collaborative Research and joint Education Programs with international institutions:


  • Research

  • Device and Circuit Co-design for Advanced Technologies (PD-SOI, FD-SOI, TFET, Molecular),
  • Low Power and Low Voltage Digital Circuit Design,
  • Low Power and Low Voltage SRAM Memory Circuits Design,
  • Low Power advanced Non Volatile Memories (OxRAM, CBRAM),
  • Implantable Biomedical Devices, communication and stimulation.


Section II: Education

  • HDR Confirmation of Leading Research Capabilities (Highest Academic Degree awarded in France) in December 1999,
  • PhD in 1989 from "Université de Paris VI" in Computer Science, VLSI IC Design,
  • Master Degree in 1985 from "Université de Paris VI" in Computer Science,
  • Engineer degree in 1979 in Electronics USTO (University of Science and Technology at Oran) Algeria.


Section III: Management of Education and Research

  • Deputy Managing Director, Research and International Cooperation 2008 to now,
  • Head of LISITE Laboratory at its creation, 2010 to now.
  • Director of Research at ISEP since March 2004 to now, in charge of establishing and coordinating 3 research teams in the fields of Micro-Nanoelectronics, Telecommunication Signal and Image processing (SITe) and Information Technologies (RDI).
  • Head of Electronics Department at ISEP since 1996 and up to 2004.
  • Head of Microelectronics Laboratory at ISEP from 1992 to 2006, France
  • Project Manager: Establishment of the Electronics Institute at "Université de Sidi Bel Abbes" from 1983 to 1984, Algeria. Up to now thousands of engineers graduated from this institute.
  • Director, Physics Department at "Université de Sidi Bel Abbes" from 1982 to 1983, Algeria.
  • Deputy –Director, Physics Department at "Université de Sidi Bel Abbes" from 1981 to 1982, Algeria.


Section IV: Research Activities

  • Since 2008, in charge of coordinating ISEP Research activities, Head of LISITE laboratory (3 teams, 21 full time researchers, currently 18 PhD students, 4 post Doctorants)
  • 1996- 2010:  Heading a team involved in Low Power Design Techniques, Ultra Low Voltage Design with advanced technologies (SOI Partially and Fully Depleted, Multi-Gates, NV-RRAM etc.) and Design-Technology Interaction. Partnership with major companies and research labs in France: CEA/LETI, STMicroelectronics, ATMEL, Thales, SORIN group…
  • 1999: Spent 6 months sabbatical as visiting researcher at Stanford University working in Professor Giovanni De Micheli’s group.
  • 1993-1996: Head of Gallium Arsenide (GaAs) design team within LIP6-UPMC working on the design of cell libraries and a set of tools for High Speed GaAs circuit design. As a demonstrator a RISC microprocessor has been implemented using VITESSE technology and our libraries, design methodology and tools.
  • 1989-1993: As a part of a European project, developed a design methodology for the procedural generation and characterization of optimized VLSI sub-blocks such as RAM, ROM, Multipliers... in CMOS Bulk technology.
  • 1988: Joined IBM research and development laboratory at Corbeil-Essonnes as visiting researcher working on SRAM memory design with advanced CMOS Bulk technologies.
  • 1985-1989: As a par of my Ph. D. research, I worked on compilation and characterization of cells for VLSI design. I proposed an approach for the synthesis of complex combinatory cells based on a set of logic synthesis tools, generation and characterization of final layout masks.  The second part of the thesis dealt with SRAM memory compilers.

Section V: Teaching activities

  • Associate Professor at "Université de Sidi Bel Abbes "from 1981 to 1984, conceived and implemented a new post-graduate program, conceived and lectured in Electronics, Algeria,
  • Promoting the Microelectronics education within CEMIP partners (Center for Education in Microelectronics) from 1989 to 1992, France.
  • Heading Microelectronics Laboratory and teaching Electronics and Microelectronics at ISEP since 1992, France,
  • Providing Trainings for professionals from industry in advanced IC Design from 1992 to 2006,
  • Design of new curriculum for specialists in Microelectronics (Microelectronics Major in 1993) and System On Chip Master of Science (MSc) Program in 2003, taught in English). The MSc program is still running with continuous updates.
  • Lecturer/invited speaker in many foreign universities, among them: Stanford (USA), UC-Davis (USA), Louvain-La-Neuve University (Belgium), IME (A-Star) Singapore, Hitach Research Lab (Japan), University College Dublin (Ireland), IIT Chennai (India), DA-IICT (India), MEIJI University (Japan), MIT (India), Pondicherry Engineering College (India), EPFL (Switzerland), SIIT (Thailand), ENSET (Algeria), ENIE (Algeria), Lodz University (Poland).
  • Member of external thesis review committees of more than 30 PhD thesis in France and abroad. I chaired the jury of 10 of them.
  • Advised or co-advised 20 PhD students, all successfully completed,
  • Currently advisor or co-advisor of 4 PhD students,
  • Numerous graduate and undergraduate students were involved in my research activities as part of their curricula through one or 2 semesters research projects.
  • As part of European ERASMUS program, I welcomed and advised about 10 students for a one or two semesters research projects.
  • As part of European Tempus project with Algeria I lectured in Algeria and welcomed Algerian teachers for a 2 weeks training at ISEP.
  • As part of CEFIPRA (Indo-French Foundation for Advanced Research), I lectured in India and welcomed Indian Professors for research exchange and interactions.
  • Initiated many partnership agreements (more than 20) with foreign universities dealing with education and research all around the world (Europe, Asia, USA) among them Stanford Overseas Studies (ISEP is the Headquarter in France), University of California Davis, Nanyang Technological University (Singapore), Hong Kong University of Science and Technology, Houazhong University of Science and Technology, National Chaotong Technological University, Catholic University of Louvain (Belgium), Lodz University (Poland)…

Section VI: Major Grants and Research Funding

  • ATMEL: Low Power SRAM memories, 128 K€. 1 PhD student, main investigator,
  • STMicroelectronics: 99,6 k€ in addition to full funding of 3 PhD students (almost 360 K€), Low Power digital circuits design with SOI technology, main investigator,
  • CEA-LETI: 260 K€ in addition to funding of 10 PhD students (almost 960 K€), various topics related to advanced technologies (PD-SOI, FD-SOI, 3D integration, Molecular Electronics, Non Volatile OxRAM and CBRAM…), main investigator,
  • SORIN-GROUP: 288 K€, research on medical implants (pacemakers). 2 PhD students, co-investigator: investigation of in and out body communication and multi sites cardiac stimulation using a reconfigurable lead with embedded electronics,
  • THALES COMMUNICATION: 135 K€, low power wireless communication. 1 PhD students, 25% involvement, co-investigator,
  • 17 among 20 PhD students I advised or co-advised were funded by industry.

Section VII: International Conferences and Journals Organization and Editorship

  • Co-editor of FTFC 2013 Special Edition of Journal Of Low Power Electronics.
  • General Co-Chair of EUROSOI 2013, European Conference on SOI.
  • General Chair of IEEE ISCAS 2010 held in Paris (1400 participants).
  • Conference Chair of IEEE ICICDT 2008 held in Grenoble, Minatec.
  • Local arrangement chair of IEEE HISTELCON (supported by IEEE region 8) in September 2008.
  • Local arrangement chair of DATE in 2004.
  • Special Sessions Chair at IEEE ICECS 2007, IEEE NEWCAS 2010 and 2011 and 2012, 2013.
  • International Liaison in IEEE ICECS 2006, IEEE NEWCAS, MWCAS 2007, IEEE ISCAS 2007, 2009, 2011, 2012, IEEE DELTA 2008, 2009, 2010, 2011,
  • Tutorial Chair at IEEE NEWCAS 2006 and 2014.
  • Founder of the IEEE FTFC workshop in 1997 (Low Voltage and Low Power), the workshop is held in France every year. FTFC is now an IEEE CASS Technically co-sponsored Conference (average of 60-70 participants). Chair of the Steering Committee.
  • Involvement in numerous Technical Program Committees of IEEE conferences (ISCAS, DAC, NEWCAS, DATE, ICECS, DELTA, VLSI-SoC, ICICDT)
  • Track Chair, DATE 2004, VLSI-SoC 2006, IEEE ICECS 2013.
  • Panel organizer and moderator at IEEE NEWCAS 2005, ICICDT 2007.
  • Panel organizer and moderator at SAME 2006, Sophia Antipolis, Nice 2006.
  • Short course on VHDL Modeling for Low Power at Marlow workshop in 2004.
  • Session Chair in many conferences (ISCAS, DATE, NEWCAS, ICICDT, VLSI-SOC…).
  • Reviewer for IEEE journal "Transaction on Computer Aided Design", the Elsevier journal “Microelectronics Journal”, UK.
  • Member of the “Microelectronics Journal” Board of Editors, Elsevier, UK.
  • Guest editor of a special issue on "SOC for Telecommunication”, “Annales des Télécommunications”, 2004.
  • Co-founder of GIS eSys (Paris largest Research and Education Network in Electronics). Member of the Executive and Technical Committees




Section VIII: Expert For Research Institutions

  • Expert for the Swiss National Science Foundation (SNSF), Switzerland, Nanotera Program since 2009 to now.
  • Expert for the AII (Industrial Innovation Agency) French Research Funding Agency for Industry, now merged with OSEO (French state organization for funding Industrial innovative projects),
  • Former member of CEA Scientific Committee (CEA: Atomic Energy Agency), in charge of reviewing CEA Research Laboratories activities in the field of Information and Communication Technologies, up to 2009, AERES took over after this date.
  • Expert for ANR (French National Research Agency),
  • Expert for the OMNT (Micro Nano Technology Observatory),
  • Member of the jury of the “Paris Innovation Award” in 2005,
  • Member of the jury of “Edouard Branly Award” 2008 to now.


Section IX:  Activities within IEEE

  • Elected, by the CASS Board of Governors, member of the CASS Executive Committee serving as VP Conference, 2014-2015 terms. Reelected for the term 2016-2017.
  • Elected twice, by CASS members worldwide, member of the IEEE CAS Board of Governors, serving in the Conference Division, 2008-2010 and 2012-2014.
  • Elected President of the IEEE France Section, 2014-2016 terms.
  • Elected General Vice President, IEEE France Section, 2008-2010 and 2011-2013.
  • Past CAS Chapter Chair, The Chapter under my leadership was awarded the “2004 Chapter of the Year Award".
  • Elected Vice President Membership Development, IEEE France Section 2005-2007,
  • Organization of joint Technical activities involving local industry.
  • As Chapter Chair I supported numerous conferences organized in France (ISCAS, ICECS, NEWCAS, DCIS, FTFC, SAME, TAISA, ECECS, ICICDT…).
  • Strongly encouraged IEEE student activities at ISEP, and was appointed by IEEE “Counselor of ISEP IEEE Student Branch” till 2010. So far, ISEP SB is one of the most active in France with many high standing achievements.

Section X: Awards and Recognitions

  • IEEE Senior Member.
  • IEEE CASS 2004 Chapter of the Year Award under my leadership.
  • IEEE Region 8 Certificate of Achievement, recognition of my contribution to IEEE activities as Chapter Chair (2000-2005).
  • “Grande Médaille de Paris” for organizing ISCAS 2010 in Paris, General Chair, 1400 participants.
  • Appointed “Ambassador” of the city of Paris, 2008 to now.
  • Bronze Medal of the Grenoble City for organizing ICICDT 2008 in Grenoble Minatec, Conference Chair, 250 participants.
  • 2003-2004 Intellectual Property Award (Prix de la Propriété Intellectuelle 2003-2004), awarded by CNCPI (Compagnie Nationale des Conseils en Propriété Industrielle) and ASPI (Association des Spécialistes en Propriété Industrielle de l’Industrie) for the patent " Self-Refresh Partially Depleted SOI SRAM memory cell ".

         Section XI: Awards obtained by my students in various conferences             

  • Best Student Paper Award, IEEE IEDM 2009.
  • Bronze Leaf Award, IEEE PRIME 2008.
  • Best Student Paper Award, IEEE ECS 2008.
  • Best Student Paper Award, IEEE DELTA 2008.
  • Best Student Paper Award, IEEE ICICDT 2008.
  • Best Student Paper Award, IEEE INFOS 2007.

Section XIII: Other national activities

  • Member of the CNFM-CEMIP (Paris-Ile-de-France Center for Education in Microelectronics) Executive Committee since 1992.
  • Member of the Board of Directors “ISEP-Entreprises” Association.
  • Member and co-founder of GIS eSys (Network of 6 academic Institutions (ISEP, Télécom Paristech, ESIEE, Paris VI and Paris XI) and the CNRS), the largest research networks in Electronics of Systems in Paris area, Executive Committee and Technical Committee member.
  • Former member of “Commission des Appellations” of Telecom Paristech, member of the review committee for elevation to the grade of Professor.





E-mail : amara.amara@isep.fr